The present invention relates to a fault-monitoring circuit for a microprocessor.
DE-OS 29 46 081 discloses a microprocessor fault-monitoring circuit in which a clear signal is provided by the microprocessor after each complete program run of the microprocessor. An oscillator provides a clock signal of predetermined frequency which is fed to a count-down binary counter. At the end of each program cycle, the counted-down count of the counter is compared to a predetermined count to determine whether the program run was fault free.
Computer Module M74005-A 8810 (Siemens TELEPERM C System) includes a microprocessor having a test signal output connected to the trigger input of a monostable multivibrator. If the timing of the test signal provided by the microprocessor to the trigger input of the monostable multivibrator is not correct, the monostable multivibrator is not triggered and "times out", thereby providing a level change at the output of the monostable multivibrator. The multivibrator output is coupled to the microprocessor reset input and the level change not only resets the microprocessor, but is also used as a fault indication to indicate that the program cycle of the microprocessor did not proceed correctly.
U.S. Pat. No. 4,072,852 discloses a computer monitoring system in which periodic test pulses are generated by the central processing unit of the computer at the same frequency as the clock signal of an oscillator. An additional address code of the central processing unit is however required in order to carry out a monitoring sequence and additional circuitry is required to decode the address.